SBN1661G

16-COMMON/61-SEGMENT driver for dot-matrix STN LCD, with 512-bytes on-chip Display Data Memory

All four devices have on-chip Display Data Memory of 32-rows x 80-columns, for storing display data. Dot-matrix mapping method is used to drive the LCD panel. Therefore, a bit of the Display Data Memory corresponds to a pixel on the LCD panel. SEGMENT drivers provide display data to the LCD panel and COMMON drivers provide row-scanning signal.

All four devices have a set of internal registers. These internal registers must be properly programmed to ensure proper operation of the devices.

Display on the LCD panel is controlled by a host microcontroller. All four devices communicate with the host microcontroller via data bus and control bus. The data bus is 8-bit wide. The control bus are READ, WRITE, and Chip　Select. The host microcontroller can perform READ/WRITE operations to the internal registers and Display Data RAM of all four devices. A wide variety of microcontrollers can easily interface with the devices, as the devices can accept both 80-type interface timing and 68-type interface timing. The selection of interface timing is via the dual-function RESET/IF pin.

Features:

• Four members of the SBN1661G_X series:
  
  • the SBN1661G_M18,
  • the SBN1661G_M02,
  • the SBN0080G_S18, and
  • the SBN0080G_S02
• 16 COMMON, 61 SEGMENT STN LCD driver (the SBN1661G_M18 and the SBN1661G_M02).
• 80 SEGMENT STN LCD driver for expanding segment number (the SBN0080G_S18 and the SBN0080G_S02).
• On-chip Display Data Memory: 32-row x 80-column (totally 2560 bits).
• Dot Matrix Mapping between the Display Data Memory bit and LCD pixel.
• A "0" stored in the Display Data Memory bit corresponds to an OFF-pixel on the LCD panel; a "1" stored in the Display Data Memory bit corresponds to an ON-pixel on the LCD panel.
• 5-level external LCD bias.
• Display duty cycle: 1/16, 1/32 for all four devices.
• Two types of interface timing with a host microcontroller: the 80-type microcontroller and the 68-type microcontroller.
• Dual function RESET/IF input for chip reset and selection of microcontroller interface timing.
• 8-bit parrallel data bus; READ, WRITE, CHIP SELECT control bus.
• A set of internal registers: Display ON/OFF, Display Start Line, Static Drive ON/OFF, Memory Page Address, Memory Column Address, Duty Selection, Memory Column/Segment mapping, and Status.
• Display Data Read/Write commands and Software Reset command.
• Read-Modify-Write command for block data transfer from the host microcontroller to the Display Data Memory.
• Power-saving mode.
• On-chip RC-type oscillator, requiring only an external resistor (the SBN1661G_M18).
• Operating voltage range (VDD): 2.7 ~ 5.5 volts.
• LCD bias voltage (VLCD=V5-VDD): -13 volts (max.).
• Operating frequency range: 2 KHz, 18 KHz.
• Operating temperature range: -20 to +75 °C.
• Storage temperature range: -55 to +125 °C.
• ESD
  •  exceeding 4000 V (HBM EIA/JESD22-A114-B).
  •  exceeding 300 V (MM EIA/JESD22-A115-A).
• Latch-up: >250 mA

For more information, please contact :  tony.hsieh@avantsemi.com.tw